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SN74LVC573ADWR

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IC OCT TRANSP D-TYP LATCH 20SOIC

HerstellerTexas Instruments
Herstellerteil #SN74LVC573ADWR
Datenblatt SN74LVC573ADWR DataSheet
Paket SOIC-20
Auf Lager2674

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Spezifikationen

Attribut	Wert
Supplier	Texas Instruments,Rochester Electronics, LLC
Package	Tape & Reel (TR),Cut Tape (CT),Bulk
Series	74LVC
ProductStatus	Active
LogicType	D-Type Transparent Latch
Circuit	8:8
OutputType	Tri-State
Voltage-Supply	1.65V ~ 3.6V
IndependentCircuits	1
DelayTime-Propagation	2ns
Current-OutputHighLow	24mA, 24mA
OperatingTemperature	-40°C ~ 85°C
MountingType	Surface Mount
Package/Case	20-SOIC (0.295, 7.50mm Width)

Übersicht

Description

The SN74LVC573ADWR is an 8-bit, transparent D-type latch with 3-state outputs from TI’s SN74LVC family. It is used to buffer and store data on a common bus, enabling safe data handoff between domains or devices.
Key features
- D0–D7 inputs and Q0–Q7 outputs
- LE (latch enable): when high, Q follows D; when LE goes low, Q holds the last value
- OE (output enable, active low): OE low enables outputs; OE high puts outputs in high impedance
- Operates from 1.65 V to 3.6 V (low-power CMOS)
- 8-bit storage with tri-state outputs
- ADWR suffix indicates the package/shipping variant (typical 8-pin package with reel)
Applications
- Bus interfacing and data buffering
- Temporary data storage in mixed-voltage systems
Note: This is a latch (not a flip-flop); data moves with LE when high and is held when LE is low.

Equivalent

Equivalent parts (octal D-type transparent latch with 3-state outputs):
- TI: SN74LVC573A (and variants like SN74LVC573ADW/ADWR)
- Nexperia (formerly NXP): 74LVC573A
- STMicroelectronics: 74LVC573A
- Renesas: 74LVC573A variants
- Diodes Inc: 74LVC573
All share 8-bit D-type latch functionality, 3-state outputs, and similar LVC voltage range (1.65–3.6V).

Features

Key features of SN74LVC573ADWR:
- 8-bit D-type transparent latch with 3-state outputs
- Separate latch-enable (LE) and output-enable (OE) control
- Operates from 1.65 V to 3.6 V (LVC family)
- CMOS/TTL-compatible input levels for standard bus interfacing
- Outputs go to high-impedance when OE is deasserted; data latched when LE is active
- Low-power CMOS device suitable for bus buffering and data isolation
- Suitable for 8-bit buffering between devices running at common logic levels
Note: For exact electrical specs (propagation delay, I/O current, exact package), consult the TI datasheet.

Pinout

- Pin count: 20 pins (TSSOP-20 package).
- Function: 8-bit D-type transparent latch with 3-state outputs. D0–D7 inputs are latched to Q0–Q7 when LE is asserted; when LE is deasserted, Q outputs hold the last value. OE enables/disables the tri-state outputs (active-low). Includes VCC and GND pins.

Manufacturer

- Manufacturer: Texas Instruments (TI).
- Company type: American multinational semiconductor company that designs and manufactures integrated circuits and related products (analog, digital, processors, sensors, etc.).

Application

SN74LVC573ADWR is an 8-bit D-type latch with 3-state outputs. Key applications include:
- 8-bit data latch/buffer for fast bus data capture
- Tri-state bus driver to isolate devices on a shared data bus
- Demultiplexing/multiplexed address–data lines (address latch for multiplexed buses)
- Glue logic and I/O expansion in microcontroller/microprocessor systems
- Simple register for data transfer or synchronization between clock domains
These uses take advantage of its fast, low-voltage CMOS operation and the ability to selectively drive or tri-state the outputs.

Package

20-pin wide-body TSSOP (DWR) package; RoHS-compliant, Tape & Reel.